Executive summary

TSMC is developing a packaging technology modeled on Intel's EMIB, marking a rare instance of the world's largest contract chipmaker adopting a competitor's approach. Intel's EMIB-T recently achieved a 98% yield rate, matching TSMC's dominant CoWoS method, and has attracted interest from Google, Amazon, and Nvidia. The shift highlights packaging as a critical battleground in AI chip manufacturing.

What happened

TSMC is quietly building a new packaging technology modeled on Intel's EMIB approach, according to a report from The Information. TSMC engineers internally refer to the project as EMIB-like, and the company is developing it with Taiwanese substrate maker Kinsus Interconnect Technology. Intel's EMIB-T packaging recently hit a 98% yield rate, matching the performance of TSMC's widely used CoWoS technology. The development comes as TSMC's CoWoS capacity is sold out through 2027, with some customers facing wait times exceeding one year. Intel has drawn interest from major customers including Google, Amazon, and Nvidia for its packaging services. Intel reported second-quarter revenue of $16.13 billion, marking 25.4% year-over-year growth, its strongest in fifteen years. Data Center and AI revenue climbed 59%, while Foundry revenue rose 31%. TSMC posted quarterly revenue of $40.2 billion, up 36% year-over-year, with gross margin reaching 67.7%. Advanced nodes at 7nm and below accounted for 77% of wafer revenue. Intel's 18A process technology entered risk production on schedule, with Panther Lake processors reaching high-volume manufacturing using ASML's High-NA EUV tools. Intel's foundry segment generated $5.8 billion in total revenue, though only $293 million came from external clients.

Why it matters

TSMC adopting elements of Intel's packaging approach represents a strategic shift in the AI chip manufacturing landscape. Packaging has emerged as a critical technology for handling increasingly large AI chip designs, and Intel's EMIB method offers a cost advantage over TSMC's CoWoS by using small silicon bridges only where chips connect, rather than a large and expensive silicon layer. TSMC's capacity constraints are creating an opening for Intel to attract customers who might otherwise wait over a year for CoWoS capacity. If major hyperscalers adopt Intel's packaging technology, they may also consider Intel's foundry services for chipmaking, which represents a significantly larger revenue opportunity. Intel's foundry business currently relies heavily on internal customers, with external revenue representing just 5% of the $5.8 billion total. Gaining external packaging customers could serve as a bridge to winning broader foundry business. For TSMC, the Kinsus project signals recognition that packaging flexibility and cost matter as much as pure process leadership. Intel's packaging success also benefits from heavy U.S. government support through the CHIPS Act, which provided $8.9 billion in grants and positioned Intel as a strategic domestic manufacturing option. The U.S. government holds roughly a 10% stake in Intel through CHIPS Act mechanisms.

Bigger picture

The competition in advanced chip packaging reflects broader shifts in the semiconductor industry driven by AI demand. TSMC maintains a commanding lead in overall chip manufacturing, with a market capitalization near $2.07 trillion compared to Intel's $466 billion. TSMC's dominance is backed by consistent profitability, with gross margin of 67.7% versus Intel's non-GAAP gross margin of 41.8%. Analysts expect TSMC to deliver 58% EPS growth in 2026, slowing to 28-30% in subsequent years, while Intel faces a recovery from a deeply depressed baseline. Intel's forward price-to-sales ratio of 7.22x sits 145% above its five-year average, reflecting market pricing of a turnaround still in progress. TSMC's forward price-to-sales ratio of 11.62x is roughly 46% above historical levels, but supported by $80 billion in net cash and proven execution. Intel carries approximately $21 billion in net debt and posted a $2.1 billion operating deficit in its foundry segment last quarter. Geographic and geopolitical considerations add another dimension, as TSMC's advanced process development remains centered in Taiwan despite $265 billion in global expansion commitments, including $100 billion in new U.S. investment. Intel offers sovereign manufacturing optionality that TSMC cannot easily replicate, particularly for defense and hyperscale customers concerned about supply chain concentration. Wall Street remains divided on Intel, with a consensus Hold rating across 45 analysts and an average price target of $114.50 implying 15% upside, while TSMC holds a Strong Buy rating from 17 analysts with a median target of $503.15 suggesting 21% upside.

What to watch

The critical test for Intel will be whether 18A process technology converts early customer tape-outs into high-volume production wins from external foundry customers. Several hyperscalers and government programs have taped out designs on 18A, but profitability and yield at commercial scale remain unproven. Intel's ability to sustain data center momentum will also matter, particularly whether Xeon pricing power holds as supply catches up with demand. TSMC's capacity expansion timeline and 2nm production ramp costs will influence whether packaging alternatives gain broader traction. Intel's third-quarter guidance calls for revenue between $15.8 billion and $16.8 billion with non-GAAP gross margin near 42%, while TSMC guided to $44.6 billion to $45.8 billion with gross margin of 65% to 67%. Investors should monitor whether TSMC's Kinsus packaging project reaches commercial deployment and whether it impacts Intel's ability to win customers through packaging as an entry point. Intel's foundry losses and restructuring execution will also signal whether the turnaround thesis can hold against a valuation that already assumes significant success.

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